美国加州理工学院Oskar Painter团队通过级联玻色子量子比特实现了硬件高效的量子纠错。该项研究成果发表在2025年2月26日出版的《自然》杂志上。

为了解决具有实际重要性的问题，量子计算机可能需要结合量子纠错，其中逻辑量子比特被冗余地编码在许多有噪声的物理量子比特中。与纠错相关的大型物理量子比特消耗促使人们寻找更具硬件效率的方法。

研究组使用超导量子电路实现了一个逻辑量子比特存储器，该存储器由编码的玻色子猫量子比特与距离d=5的外部重复码级联而成。稳定电路被动地保护猫量子比特免受比特翻转。使用辅助transmon量子比特进行综合征测量的重复码可以校正猫量子比特的相位翻转。课题组研究了逻辑量子比特存储器的性能和可扩展性，发现相位翻转校正重复码在阈值以下运行。

通过实现猫传输噪声偏置的CX门，随着猫量子比特平均光子数的增加，逻辑位翻转错误得到了抑制。对于距离3代码段，每个周期的最小测量逻辑误差平均为1.75（2）%，对于距离5代码段，平均为1.65（3）%。尽管距离5代码的故障位置数量增加，但在纠错过程中保留的高度噪声偏差使得性能相当。这些结果表明，级联玻色子编码的内在误差抑制使人们能够使用硬件高效的外部纠错码，这表明级联玻色子码可以成为实现容错量子计算的引人注目的模型。

附：英文原文

Title: Hardware-efficient quantum error correction via concatenated bosonic qubits

Author: Putterman, Harald, Noh, Kyungjoo, Hann, Connor T., MacCabe, Gregory S., Aghaeimeibodi, Shahriar, Patel, Rishi N., Lee, Menyoung, Jones, William M., Moradinejad, Hesam, Rodriguez, Roberto, Mahuli, Neha, Rose, Jefferson, Owens, John Clai, Levine, Harry, Rosenfeld, Emma, Reinhold, Philip, Moncelsi, Lorenzo, Alcid, Joshua Ari, Alidoust, Nasser, Arrangoiz-Arriola, Patricio, Barnett, James, Bienias, Przemyslaw, Carson, Hugh A., Chen, Cliff, Chen, Li, Chinkezian, Harutiun, Chisholm, Eric M., Chou, Ming-Han, Clerk, Aashish, Clifford, Andrew, Cosmic, R., Curiel, Ana Valdes, Davis, Erik, DeLorenzo, Laura, DEwart, J. Mitchell, Diky, Art, DSouza, Nathan, Dumitrescu, Philipp T., Eisenmann, Shmuel, Elkhouly, Essam, Evenbly, Glen, Fang, Michael T., Fang, Yawen, Fling, Matthew J., Fon, Warren, Garcia, Gabriel, Gorshkov, Alexey V., Grant, Julia A., Gray, Mason J., Grimberg, Sebastian, Grimsmo, Arne L., Haim, Arbel, Hand, Justin, He, Yuan, Hernandez, Mike, Hover, David, Hung, Jimmy S. C., Hunt, Matthew, Iverson, Joe, Jarrige, Ignace, Jaskula, Jean-Christophe, Jiang, Liang, Kalaee, Mahmoud, Karabalin, Rassul, Karalekas, Peter J., Keller, Andrew J., Khalajhedayati, Amirhossein, Kubica, Aleksander, Lee, Hanho, Leroux, Catherine, Lieu, Simon, Ly, Victor, Madrigal, Keven Villegas

Issue&Volume: 2025-02-26

Abstract: To solve problems of practical importance1,2, quantum computers probably need to incorporate quantum error correction, in which a logical qubit is redundantly encoded in many noisy physical qubits3,4,5. The large physical-qubit overhead associated with error correction motivates the search for more hardware-efficient approaches6,7,8,9,10,11,12,13,14,15,16,17,18. Here, using a superconducting quantum circuit19, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d=5 (ref.10). A stabilizing circuit passively protects cat qubits against bit flips20,21,22,23,24. The repetition code, using ancilla transmons for syndrome measurement, corrects cat qubit phase flips. We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below the threshold. The logical bit-flip error is suppressed with increasing cat qubit mean photon number, enabled by our realization of a cat-transmon noise-biased CX gate. The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the distance-5 code. Despite the increased number of fault locations of the distance-5 code, the high degree of noise bias preserved during error correction enables comparable performance. These results, where the intrinsic error suppression of the bosonic encodings enables us to use a hardware-efficient outer error-correcting code, indicate that concatenated bosonic codes can be a compelling model for reaching fault-tolerant quantum computation.

DOI: 10.1038/s41586-025-08642-7

Source: https://www.nature.com/articles/s41586-025-08642-7