近日，韩国三星技术院（SAIT）Choe, Duk-Hyun团队报道了用于低功耗NAND闪存的铁电晶体管。相关论文于2025年11月26日发表在《自然》杂志上。

NAND闪存是现代存储技术的核心，尤其在以数据为中心的计算和人工智能驱动的低功耗需求日益增长的背景下。其独特的“字串”架构（多个存储单元串联）需要高压字线操作，导致大量不必要的功耗。然而，降低字串电压会带来挑战：这会导致存储窗口相应缩小，限制多级操作能力。

研究组采用掺杂氧化铪和氧化物半导体通道组成的栅极堆叠结构，开发了超低功耗铁电场效应晶体管（FeFET），成功解决了这一难题。该FeFET实现了每个单元高达5比特的多级操作能力，与现有NAND技术相当甚至更优，同时字串电压接近零，相比传统方案在字串级操作中节省高达96%的功耗。通过将FeFET堆叠三维集成到25纳米短沟道的垂直结构中，不仅保留了稳健的电学特性，还凸显了短沟道下的低字串电压操作优势。该研究为下一代兼具高容量、高能效和高可靠性的存储器铺平了道路。

附：英文原文

Title: Ferroelectric transistors for low-power NAND flash memory

Author: Yoo, Sijung, Kim, Taek Jung, Nam, Seung-Geol, Kim, Donghoon, Kim, Kihong, Lee, Yunseong, Jung, Moonil, Lee, Kwang-Hee, Choi, Seokhoon, Hyun, Seung Dam, Lee, Min-Hyun, Hong, Seogwoo, Kim, Haesung, Bae, Ki Deok, Lee, Hyangsook, Won, Jung Yeon, Yun, Dong-Jin, Chae, Byeong Gyu, Hahn, Wook Ghee, Joo, Chang Hyun, Jo, Sanghyun, Park, Yoonsang, Song, Kyung Mee, Jung, Kyooho, Lim, Suhwan, Seo, Kwangyou, Kim, Kwangsoo, Kim, Wanki, Ha, Daewon, Yang, Jee-Eun, Yang, Seung-Yeul, Kim, Sangwook, Heo, Jinseong, Choe, Duk-Hyun

Issue&Volume: 2025-11-26

Abstract: NAND flash memory is essential in modern storage technology, amid growing demands for low-power operation fuelled by data-centric computing and artificial intelligence1,2. Its unique ‘string’ architecture3, where multiple cells are connected in series, requires high-voltage pass operation that causes a large amount of undesired power consumption4. Lowering the pass voltage, however, poses a challenge: it leads to an associated reduction in the memory window, restricting the multi-level operation capability. Here, with a gate stack composed of zirconium-doped hafnia and an oxide semiconductor channel, we report ultralow-power ferroelectric field-effect transistors (FeFETs) that resolve this dilemma. Our FeFETs secure up to 5-bit per cell multi-level capability, which is on par with or even exceeds current NAND technology, while showing nearly zero pass voltage, saving up to 96% power in string-level operations over conventional counterparts. Three-dimensional integration of FeFET stacks into vertical structures with a 25-nm short channel preserves robust electrical properties and highlights low-pass-voltage string operation in scaled dimensions. Our work paves the way for next-generation storage memory with enhanced capacity, power efficiency and reliability.

DOI: 10.1038/s41586-025-09793-3

Source: https://www.nature.com/articles/s41586-025-09793-3